For some applications of semiconductor IC devices, it is desirable for the IC devices to operate at relatively high voltages, for example, in a range of 15–80 volts. LDMOS devices have been widely used as devices for control, logic and especially power switching. LDMOS devices may have a relatively high breakdown voltage so as to insulate high voltages. In addition, LDMOS devices may preferably have a low “ON” state resistance so as to provide good switching characteristics approaching those of an ideal switch.
In previously developed and deployed ICs, a power device may implement structures having an isolated RESURF (reduced surface field), so as to reduce electric fields at the substrate surface in pursuit of high breakdown voltage and low on-resistance. Isolated RESURF techniques may provide good electrical isolation between source and substrate which permits the use of LDMOS devices in high-side driver applications, especially since the Source is not coupled to ground.
FIG. 1 is a cross-sectional diagram of a semiconductor device, formed according to previously developed techniques for isolated RESURF.
As shown in FIG. 1, a N+ buried layer 12 is formed on a P-substrate 10, and a P−epitaxial layer 14 with a particular thickness is formed on the N+ buried layer 12. An N-well 18 is formed on the P− epitaxial layer 14 region.
A gate 24 and gate insulating layers 20, 22 are formed on an N-well 18 region. The gate insulating layers 20, 22 may include a thick-film gate oxide layer 20 and a thin-film gate oxide layer 22. A P-body region 26 is shown formed on the P− epitaxial layer 14 to the side of gate 24, and a source region 28a and a P+ junction region 30 are formed on the P-body region 26. A drain region 28b is formed on the N-well 18 on the opposite side of the gate 24.
The gate 24 may be connected to a gate electrode (G), the source region 28a and the P+ junction region 30 may be connected to a source electrode (S), and the drain region 28b may be connected to a drain electrode (D).
Still referring to FIG. 1, in the previously developed isolated RESURF technique, if an inverse bias is applied to the LDMOS device through the drain electrode, a depletion region begins to extend at the P-N junction interface between the N-well 18 and the P− epitaxial layer 14, in a vertical direction. When the extension of the depletion region passes a limit, a breakdown will occur in the LDMOS device. In this LDMOS device, the P− epitaxial layer 14 and N-well 18 are used as an isolated RESURF structure to provide the desired electrical isolation. Breakdown typically occurs between the P− epitaxial layer 14 and the N-well 18, and the breakdown voltage is substantially in direct proportion to the thickness of the P− epitaxial layer 14. Accordingly, the P− epitaxial layer 14 may be grown to considerable thickness so as to achieve a high breakdown voltage.
Whenever it is desired to manufacture a single device comprising transistors of various types of devices (e.g., bipolar transistor, CMOS (complementary MOS), and DMOS (double-diffused MOS)), such as a BCD (bipolar-CMOS-DMOS) device, a conflict may arise. For if the thickness of the epitaxial layer is increased to achieve a higher breakdown voltage for the DMOS it then becomes increasingly difficult to achieve desirable characteristics in the device of other types such as bipolar transistor and CMOS.
Alternatively, if the various desirable thickness of epitaxial layers desirable for each type of device are implemented, then the process for manufacturing power devices becomes excessively complex due to an excessive number of steps required in the process of forming the device. Furthermore, increasing manufacturing process complexity drives up costs.
In previously developed devices a further compromise may be necessary in that—it may be necessary to increase the doping concentration of the N-well 18 so as to obtain a low “ON” resistance of the power device. As the doping concentration of the N-well 18 is increased, the depletion region tends to extend at a faster rate, and a relative decrease in the breakdown voltage occurs, thus giving incentive to using a still thicker epitaxial layer.